The present application relates to a semiconductor structure and a method of forming the same. More particularly, the present application relates to a semiconductor structure including a plurality of waveguide structures embedded within a semiconductor handle substrate and including a buried oxide having a variable thickness located atop the semiconductor handle substrate and each waveguide structure of the plurality of waveguide structures and a method of forming such a semiconductor structure.
Optical devices can be made on silicon substrates, because silicon provides many benefits for optical communication. For example, the high index-of-refraction contrast between silicon and silicon dioxide can be used to create sub-micron waveguides to confine light with spatial densities that are up to 100× larger than in a single-mode optical fiber. Furthermore, by using silicon-on-insulator (SOI) technology, a silicon waveguide can be surrounded by silicon dioxide on all four sides, which facilitates low-loss, on-chip waveguides and active devices (such as detectors and modulators). These silicon-based optical devices offer numerous advantages, including: miniaturization, low-energy modulation, the ability to integrate with other devices in silicon, and/or the ability to leverage the large, existing silicon manufacturing infrastructure.
Unfortunately, there are problems associated with silicon waveguides that are surrounded by a buried oxide or other like dielectric material. One major problem of such waveguides is that a thick buried oxide or other like dielectric material is needed to surround the waveguide core material in order to effectively confine light within the waveguide core material. This thickness requirement of the buried oxide or other dielectric material however causes heat dissipation problems within a chip. As such, there is a need to provide a waveguide structure in which the waveguide core material is surrounded by a buried oxide or other like dielectric material which efficiently confines light, yet is able to let the chip dissipate heat.